Plasma etching is widely used in the fabrication of silicon integrated circuits. One of its uses, often called dielectric etching, is used to form holes through dielectric layers to provide vertical electrical connections between different levels of the integrated circuit. A prototypical via structure is schematically illustrated in the cross-sectional view of FIG. 1. A lower dielectric layer 10 formed on the surface of a wafer has a conductive feature 12 formed in its surface. An upper dielectric layer 14 is deposited over the lower dielectric layer 10 and its conductive feature 12. A planar photoresist layer 16 is spun onto the so far unpatterned upper dielectric layer 14 and a stepper photographically exposes it according to a pattern of radiation to form a mask aperture 18 through the photoresist layer 16 to thereby form a photomask with the mask aperture 18 overlying the conductive feature 12 to be electrically contacted through a via. There may be additional layers formed between the upper dielectric layer 14 and the photoresist layer 16 such as an etching hard mask or an anti-reflection coating. The photomasked wafer is placed into a plasma etch reactor, which etches through the upper dielectric layer 14 down to the conductive feature to form a via hole 20. Typically, the same etch reactor also etches through the anti-reflection coating and hard mask, if any, with the etching chemistry being changed between the layers. The dielectric etching is typically based on a fluorocarbon chemistry, for example, using hexafluorobutadiene (C4F6).
After the dielectric etching, the via hole 20 is filled with a metal such as aluminum or copper to provide a vertical electrical connection to the conductive feature 12. For a dual-damascene structure typically used with copper metallization, the via hole 20 is replaced by a shorter via hole at the bottom of the upper dielectric layer 14 connected to a horizontally extending trench at the top, both of which are simultaneously filled with copper. For a contact-layer metallization, the lower dielectric layer 10 is replaced by an active silicon layer and the conductive feature 12 is also composed of silicon although there may be complex silicides and gate oxides at the interface with the via hole 20, which in this case is properly called a contact hole.
At the completion of dielectric etching, some of the photoresist may remain on top of the dielectric layer 14 or etching residues, often of a carbonaceous composition, may remain in the via hole 18. The residues may form a polymeric coating 22 on the sides of the via hole 20, which assists in producing a vertical etching profile, or form isolated etch residues 24 including some at the bottom of the via hole 20. Similar polymeric coatings may cover the remainder of the photoresist to produce a hardened outer surface. The metal filling process requires that the via hole 20 be coated with a conformal liner including barrier layers and, in the case of copper metallization performed by electrochemical plating (ECP), a copper layer acting a seed layer and electroplating electrode. Currently, the barrier layer is typically a bilayer of TaN/Ta and it and the copper seed layer may be deposited by advanced forms of sputtering. It is important that the photoresist and other residues be removed from the structure prior to deposition of the layers lining the via hole since they degrade adhesion to the via sidewalls and increase contact resistance at the via bottom and in both cases affect device yield and reliability.
Plasma ashing has long been practiced to remove photoresist and other residues after etching. An oxygen plasma is very effective at etching away carbon-based layers. Although ashing was previously performed in a barrel asher designed for batch processing a large number of wafers, more current technology uses single-wafer plasma ashers, either as separate etch reactors or in a separate processing step performed in the same plasma etch reactor used for dielectric etching.
Conventional ashing is effective when the dielectric layer are formed of silicon dioxide (silica) having an approximate chemical composition of SiO2 having a dielectric constant of around 3.9. Ashing has however presented difficulties when applied to more advanced low-k dielectrics needed for advanced integrated circuits. Early low-k dielectrics were formed by doping silica with fluorine to reduce the dielectric constant to about 3.5. Even lower dielectric constants in the low-3 range can be obtained by a hydrogenated silicon oxycarbide material, such as Black Diamond dielectric available from Applied Materials of Santa Clara, Calif. Still lower dielectric constants of less than 3 have been obtained by depositing such materials to be porous. Oxygen ashing of these materials causes many problems. The oxygen plasma not only attacks the carbonaceous photoresist remnants and other residue, it also tend to deplete the carbon content of the silicon oxycarbide and increases its dielectric constant. Porous dielectric materials are relatively fragile and even more prone to damage from the oxygen plasma due to partial penetration of oxygen into the pores and the collapse of the pores.
Accordingly, advanced ashing has shifted from the oxidizing chemistry of an oxygen plasma to a reducing chemistry of a plasma formed of some combination of hydrogen and possibly nitrogen, for example, H2, H2/N2, or NH3. Ashing based on hydrogen radicals H* exhibits higher performance and less dielectric damage than oxygen ashing. However, hydrogen ashing is a very slow process due to a low reducing reaction rate and the low hydrogen radical density generated in an environment of only reducing gases. While oxygen ashing may require 20 seconds of processing, hydrogen ashing may require ten times as long, clearly an economic disadvantage. Accordingly, often a small amount of oxygen may be added to the reducing gas to increase the ashing rate and ashing efficiency. However, porous low-k materials are sensitive even to small amounts of oxygen, which can remove significant carbon from the silicon oxycarbide material and collapse the pore structure and increase the dielectric constant.